fn7757 rev.0.00 page 1 of 2 february 1, 2011 fn7757 rev.0.00 february 1, 2011 TW8806 lcd flat panel tv / pc monitor controller with built-in ntsc/pa l/secam decoder, analog rgb, dac and t-con data short to request the full datasheet, please visit www.intersil.com/products/TW8806 techwells TW8806 lcd display pr ocessor is a low cost high quality tft panel controller with an embedded ntsc/pal/secam tv decoder. this unique level of mixed signal integration enables the panel to be used as a stand- alone lcd display for in car entertainment, portable dvd and portable lcd tv applications. an integrated triple analog-to- digital converter supports ypbpr/rgb component input and allows direct connection to dv d and navigation sources. in addition, flexible digital inputs supports 24bit digital rgb and 8/16/24-bit ycbcr inputs. the TW8806 contains all the logic required to convert standard tv, dtv, and pc monitor signals to the digital control and data signals required to drive various tft panel types. it supports tft panel resolutions up to 1280 by 768 with 1- pixel/clock formats. the chip has nine analog inpu ts. this enables a number of input combinations simultaneously. for example, the chip can accept up 4 cvbs inputs simultaneously.the chip can also accept one cvbs,one s-video, one component and one analog rgb simultaneously. the integrated analog front-en d contains three adcs with three clamping circuits and one automatic gain control (agc) circuit to minimize external component count. it employs a 4h, 5-line adaptive comb filter and proprietary y/c processing technologies to produce exceptionally high quality pictures. the chip's internal logic synchronizes the panel frame rate to the incoming input frame rate. a high quality image-scaling engine is used to convert the lower resolution formats or high resolution dtv formats to the output panel resolution. an internal de-interlacing engine also allows interlaced video to be supported. on screen display is supported through an on-chip osd ram for maximum flexibility. a closed caption decoder is built in. the TW8806 also accepts a 24 bit digital rgb input from external panellinktm receiver or adcs for use as computer monitor. in addition, it accepts 8/16/24 bits digital ycbcr input for use with external adcs for use as dtv monitor. the TW8806 also supports tft panel power sequencing, dpms (vesatm display powe r management signaling) signaling and power management. the control interface is a 2- wire serial bus interface. the TW8806 core operates at 1.8 v, the io at 3.3 v and packaged in a 128-pin pqfp package. features ? integrated high performance ntsc/pal/secam video decoder ? built in high quality de-interlacing engine ? black / white / blue stretch for higher contrast ? favorite color enhancement ? integrated timing controller (t -con) with digital and analog panel support ? qvga up towxga panel resolution support ? low power consumption (600 mw) ? small form factor 128-pin pqfp 24bit digital rgb and 8/16/24-bit ycbcr inputs ? supports connection to analog pc graphics cards with the addition of a 3 channel a/d converter for up towxga resolution ? supports ycbcr digital component input for dtv 480p, 720p, 1080i tft panel support ? supports digital and analog lcd panels ? supports a wide variety of active matrix tft panels one pixel per clock timing controller (tcon) ? support programmable interface signals for control column(source) driver / row(gate) driver ? support analog rgb output ?programmable vcom output analog rgb / ycbcr inputs ? has direct connection to anal og rgb or ycbcr input up to wvga or 480p resolution ? built-in pll support for embedded or separated sync not recommended for new designs recommended replacement part tw8835 (not pin compatible)
fn7757 rev.0.00 page 2 of 2 february 1, 2011 TW8806 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2011. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. features (continued) video decoder and processing ? three 9-bit adcs and an alog clamping circuit ? fully programmable static gain or automatic gain control for the y or cvbs channel ? programmable white peak control for the y or cvbs channel ? software selectable analog inputs allows any of the following combinations: ? up to 4 composite video ? up to 2 s-video ? 1 ypbpr component ?1 rgb applications ?portable tv ? rear seat car display ?portable dvd ?navigation + dvd ? door phone ? dmb tv ? in flight display figure 1. TW8806 flat panel tv/monitor controller functional block diagram cin0 3x analog front end mux sync processor 4h adaptive comb filter chroma demodul ati on yuv processing mux color matrix line buffers sca ler /deinterlacer image enha nc ement gamma / dither panel timing generator al pha bl endi ng osd registers 2 wire serial bus input format mea surement tcon fpr[7:0] mux yin0 yin1 yin2 yin3 fpg[7:0] fpb[7:0] fpvs fphs fpde fpclk fppwc fpbias mc sda mc scl mc sia dac ro ut gout bo ut tcon signals cin1 vin0 mux spread spectrum pll soyin hsync vsync vin1 mux cin2 yout sync processor pll dtv i/f dtvclk dtvvs dtvhs dtvde dtvd[23:0] pixel c lo ck data hsync
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